DESSERT'2026

16th International Conference
Dependable Systems, Services and Technologies
Greece, Corfu, October 2-4, 2026
hybrid mode (i.e., using remote audio/video support
and as an in-person event)

IEEE
  • Important Dates

    Workshop proposal submission: July 15, 2026

    Notification of Workshop proposal acceptance: July 17, 2026

    Paper submission: August 12, 2026

    Notification of paper acceptance: September 2, 2026

    Final manuscript: September 9, 2026

    Registration and payment: September 12, 2026

    Program draft publication: September 17, 2026

    Conference date: October 2-4, 2026

  • Contacts

    Department 503, DESSERT’2026 Organizing Committee,
    National Aerospace University “KhAI”,
    Vadym Manko str., 17, Kharkiv, 61070, Ukraine
    Olena Surynovych
    Phone: +38 (066) 5389293,
    +38 (096) 1305556
    e-mail: dessert@csn.khai.edu

    www: dessert-conf.org

  • Archive

  • DESSERT'2022

    DESSERT'2023

    DESSERT'2024

    DESSERT'2025

  • Proceedings

  • Previous DESSERT Proceedings

Assessing Timing Faults Robustness of Edge AI Accelerators with Driver Level Fault Injection

Title:

Assessing Timing Faults Robustness of Edge AI Accelerators with Driver Level Fault Injection

Keynote speaker:

Marcello Cinque, Prof, Professor of Computer Engineering, University of Naples Federico II, Italy

Marcello Cinque is full professor of Computer Engineering at the University of Naples Federico II, where he teaches Operating Systems and Real-Time Systems. He earned his PhD from the same University in 2006, and he was a visiting scholar of the DEPEND group at the University of Illinois at Urbana Champaign. He’s member and co-founder of the DESSERT research group on Dependable and Secure Software Engineering and Real-Time systems (https://dessertlab.github.io/) and co-founder of a university spinoff company named Critiware (https://www.critiware.com/). His research interests are on dependability assessment and mixed-criticality real-time systems, and acted as principal investigator and lead of over ten funded projects on these topics. He’s co-author of more than 150 peer-reviewed articles, and he’s particularly active in the dependability research community, serving as Program Committee member and Chair of several conferences, including DSN, EDCC, ISSRE, and PRDC. He’s the recipient of 6 best paper awards at international conferences, including ISSRE, ISORC and ECRTS.

Abstract:
Large language models are moving from conversational assistants to agents that retrieve data, call tools and act inside enterprise workflows. In these settings the dependability question changes. A Edge AI accelerators are increasingly deployed in safety-critical environments, where timing perturbations can undermine timing predictability and, in turn, dependable system operation. However, existing assessment techniques are poorly suited to study such timing effects. Current fault-injection strategies for AI accelerators focus either on low level radiation experiments or high level framework, neglecting system level issues. In this talk we propose a cross-layer fault injection framework that targets the driver layer to systematically analyze timing failures in edge AI platforms. Using driver-level fault injection allows us to capture timing-induced failures, such as host–accelerator desynchronization, unrecoverable kernel panics, or silent data corruptions (SDCs). We evaluate the framework on two edge AI platforms, namely the Google Coral Edge TPU and the Rockchip RK3588 NPU. Results show that injected timing stalls can trigger severe cross-layer effects, leading to system crashes or incorrect predictions without user-space errors (SDC).

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