Title:

Challenges in FPGA Implementations of Cryptographic Algorithms: a Case Study of Evolution in BLAKE Hash Functions

Keynote speaker:

Dr. Jarosław Sugier, Wrocław University of Science and Technology, Poland

Jarosław Sugier holds PhD degree in Computer Engineering and works as Assistant Professor at Department of Computer Engineering, Wrocław University of Science and Technology, Poland. His research interests include programmable hardware, computer graphics and simulation, hardware implementations of cryptographic algorithms, and also numerical methods in maintenance and reliability analysis. Being an author or co-author of over 60 papers and monograph chapters in these fields, he is also active in the organizing committee of the International Conference on Dependability of Computer Systems DepCoS-RELCOMEX which is organized by the Department every year since 2006.

Abstract:

Today hash functions are ubiquitous in nearly all kinds of cryptographic applications. They can be found at the core of digital fingerprinting or watermarking and even in block or stream ciphers. As such, their efficient implementation not only in software but also in hardware is often essential for secure and reliable functioning of any contemporary IT system. This presentation will analyze challenges which arise in realization of the three evolutionary versions of the BLAKE algorithm – which started as one of the strongest contenders in the SHA-3 competition – in the configurable FPGA logic devices. In particular, it will concentrate on the (sometimes subtle) modifications introduced in the second and the third version of the algorithm and explain their deep impact on operation of the hardware. The analysis will identify specific peculiarities of BLAKE processing which are especially troublesome for FPGA resources, leading to excessive size and power consumption.